15 bit ÷ 11 bit - part the third

Wiring of the five stack-up boards is the next step; each board has 65 miniature screw terminals along its edge, plus a power connector:

Boards are kept apart with 35 mm plastic spacers, together with M3 stainless threaded rods (250 mm lengths).

The plan of attack was to interconnect the first two boards, test, then add the third board and so on, at each step cross checking the diagnostic LEDs with the Digital simulation.

The completed brick of five stacked-up boards were then mounted on to the base board and everything hooked up. And so we have the completed 15 bit hardware divider:

Testing of the individual boards and partial builds paid dividends...the completed thing worked first time: here we have C71 (hex) ÷ 439 (hex) = 2, remainder 3FF.

And here we have 7FB8 ÷ 4E7 = 1A, remainder 42 (hex):

And, here we divide by zero; 'wrong', but correct in the sense that it agrees with the Digital simulation...

Total current consumption is about 2.3 amps; the worst-case I've found is 6DB6 ÷ 1  = 6DB6, remainder 0, drawing 2.46 amps. Those old TIL 311 displays eat up about half of that.

Finally, I've had a go at measuring the time taken by the divider. Here, bit 0 of dividend (numerator) N is clocked at 100 kHz; the oscilloscope display (0.1 μs/div) shows quotient (Q) bit 0 following after a delay of about 0.14 μs, giving (perhaps) operation at something like 7 MHz. (For the record, the divisor M = 1, and dividend N = 7FFF or 7FFE, and the oscilloscope vertical display is 2 V/div).